Project Examples

FirstPass has broad experience in a wide array of projects within all market segments. Here are just a few examples:

ARM-based SOC

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  • Core Design and Verification Experience
    • XSCALE core and Concan wMMX SIMD coprocessor
    • Integration into PXA2XX family of processors for two high profile  consumer electronics customers
    • Design of
      • Instruction decode
      • Routing to coprocessor
      • MEM units
      • ALU
      • Branch & Exception unit
    • TLB hardware acceleration logic
  • Design of ARM Peripherals
    • Design of block-level DMA functions
    • Image processing
    • Encryption(SHA)
    • DSP functions
    • AMBA2/3 peripheral IP Design & Integration
    • Examples: USB2, MMC4
  • ARM Software Development
    • ARM Development Kit
    • ARM boot code
    • Cache configuration
    • I/O interrupt routines
    • SAS protocol handler

Ultra Low Power I2C Sensor hub and DSP ASIC

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  • UVM Verification environment with assertions, constrained randomization, and full coverage instrumentation on verification environment and DUT
  • Trial layout and floor-planning in 110-nm low-power process

Low-Latency DAC Waveform Storage and Replay FPGA

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  • 40-nm physical implementation
  • Design including PCIe, DDR2, and playback caching for a multi-lane SERDES output
  • UVM Verification environment
  • C++ Windows GUI and PCIe driver for controlling FPGA

ADC Data Source Demonstration ASIC

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  • 90-nm radiation-hardened process
  • Complete architecture, design, verification, synthesis, and static timing analysis
  • Assistance to the customer in Place & Route, ATE, and various timing ECOs
  • ITAR program
  • Creation of custom TMR macros

Tactical Thermal Imaging System

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  • Complete turn-key solution from system architecture specification to product including compact PCB architecture in a low-power 45-nm FPGA
  • ITAR program
  • Military-Specification rated electrical and mechanical components

SERDES Design

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  • 1 Gb/sec SerDes
    • GbE, FC, SATA1, Backplane
  • 2 Gb/sec SerDes
    • OC48, 2x FC, Infiniband, Backplane
  • 3 Gb/sec SerDes
    • SATA2, SAS, XAUI, Backplane
  • 4 Gb/sec SerDes
    • 4xFC
  • 5 Gb/sec SerDes
    • HyperTransport3

Other Processor and SOC

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  • SystemC modeling of cycle-accurate  RISC processor model
  • Design of CISC CPU engine for 80196 µController  core
    • 16-bit µC, 8-bit opcode, instruction pipe-line, branching/conditional branching, 16-bit ALU
  • Design/Verification  of a 16 bit, bit-slice architecture
    • Based on the AMD 2900 family for DARPA program
    • Major blocks/chips included:
      • Arithmetic Logic Unit (ALU)
      • Microcode Sequencer (MCS)
      • Multiplier (MPY)
      • Intelligent Pipeline Register (IPR)
      • Glue Logic (GLU)
  • Design of general purpose RISC processor
    • 32-bit MIPS instruction set
  • Design of ALU co-processor module for SOC
    • Used for vector processing acceleration
    • Application was dynamic time warping algorithms for voice recognition applications.
  • i960 Rx & Hx  processors
  • i740 and i742 graphics processors for a high profile commercial electronics customer

Serial Rocket IO (SRIO)

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  • Designed SATA component utilizing  an Altera FPGA
  • Designed PCIe/AS bridge chip, incl. RIO
  • Designed Interface between DSP Core & RIO Wrapper
  • Wrote testbench, including RIO, for Fibre Channel interface
  • Significant experience in ground-up SerDes design 1-6Gb/sec
  • Significant experience in high-speed I/O design

ASIC/FPGA Conversions and Emulations

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  • Converted DSP Filter/Control device from Virtex4 FPGA to rad-hard ASIC
  • Converted SatCom  DSP Filter device Virtex2 FPGA to rad-hard ASIC
  • Converted multiple pin/timing compatible Actel 1280 FPGAs to rad-hard ASICs
  • Established “ifdef” based design flows that targeted single designs to both FPGA and ASIC technologies
  • FPGA Emulation of many ASICs
    • 4G Fibre Channel Switch Chip, incl. SerDes
    • 5-chip DSP Channelizer (SatCom Ap)
    • PCIe to Adv. Sw. Bridge
    • SATA Controller

Miscellaneous Projects

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  • Embedded uController w/DDR, JPEG and GbE
  • Commercial satellite Channelizer (6k channels)
  • Cockpit display processor for various military aircraft platforms
  • Supercomputer processing nodes and routers
  • Graphics processor for Orion/CEV
  • Communication controller for ARES launch vehicle
  • IR camera image processing ASIC
  • DDRx memory controllers
  • PCI/PCIe bridges, switches and macros
  • Space Communication Data Link (rad-hard ASIC)
  • DARPA insertion demo (7 Ga/As ASICs)
  • Satellite solid-state recorder memory controller ASIC
  • Radar DSP pipeline ASIC
  • Data Link Formatter
  • Packet switch fabric chipsets (up to 640 Gbps)
  • ARM/AMBAx SOC solutions
  • SAS Controller
  • RF Transponder
  • Cryptographic accelerator

…and many more!